A power amplifier circuit with low output power may imply a large output load. The power amplifier circuit may require large DC-feed inductors to drive the large output loads. The large DC-feed inductors may have a very low quality-factor when implemented on-chip. The power amplifier circuit designed for low power applications may have to use off-chip components, especially for a moderate frequency range (e.g., 433 MHz for the European ISM band and the European 405 MHz medical implantable communication systems (MICS)). However, large inductors may be required for said design using off-chip components. The large inductors may have high losses and thereby reduce an efficiency of the said circuit. The large inductors may also increase the chip area needed to implement the power amplifier circuit.
The power amplifier circuit may achieve increased power efficiency through using a non-linear amplifier. However, the design may require very high quality-factor inductors. Such high quality-factor inductors may not be available in standard CMOS technology. Consequently, a fully integrated power amplifier circuit designed for low power applications (e.g., less than approximately 10 dBm) may have a lower efficiency than a power amplifier circuit designed for high power applications. Also, a non-linear amplifier may require a large input drive to achieve a maximum efficiency. This may limit the gain of the amplifier and may result in a low power-added efficiency.